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Thesis defences

PhD Oral Exam - Diaaeldin Abdelrahman, Electrical and Computer Engineering

Modeling and Design of High-Speed CMOS Receivers for Short-Reach Photonic Links


Date & time
Monday, March 22, 2021 (all day)
Cost

This event is free

Organization

School of Graduate Studies

Contact

Daniela Ferrer

Where

Online

When studying for a doctoral degree (PhD), candidates submit a thesis that provides a critical review of the current state of knowledge of the thesis subject as well as the student’s own contributions to the subject. The distinguishing criterion of doctoral graduate research is a significant and original contribution to knowledge.

Once accepted, the candidate presents the thesis orally. This oral exam is open to the public.

Abstract

The rapid growth of bandwidth requirements in data centers drives the development of high-speed and energy-efficient transceivers. The high-frequency losses introduced by electrical interconnects increase system complexity and cost to reach multi-meter distances. On the other hand, optical interconnects provide superior performance compared to their electrical counterparts in terms of bandwidth, channel losses, and immunity to interference. Optical interconnects already dominate transmission links for long-distance data communication. With scaling data centers, electrical links are being replaced by optical links over shorter and shorter distances. Optical receivers are known as the most important part of an optical communication system. The implementation of optical receivers in CMOS technology has gained wide attention. CMOS offers high-speed digital circuits with low power dissipation and high integration density. However, as data rates approach the transit frequency of a technology node, it becomes difficult to design a receiver’s analog front-end with sufficient gain in a realistic power budget.

This dissertation presents several research outcomes towards designing high-speed CMOS optical receivers for energy-efficient short-reach optical links. First, it provides a wide survey of recently published equalizer-based receivers and presents a novel methodology to accurately calculate their noise. The proposed methodology is then used to find the receiver that achieves the best sensitivity.

Second, the trade-off between sensitivity and power dissipation of the receiver is optimized to reduce the energy consumption per bit of the overall link. Design trade-offs for the receiver, transmitter, and the overall link are presented, and comparisons are made to study how much receiver sensitivity can be sacrificed to save its power dissipation before this power reduction is outpaced by the transmitter’s increase in power. Unlike conventional wisdom, our results show that energy-efficient links require low-power receivers with input capacitance much smaller than that required for noise-optimum performance.

Third, the thesis presents a novel equalization technique for optical receivers. A linear equalizer (LE) is realized by adding a pole in the feedback paths of an active feedback-based wideband amplifier. By embedding the peaking in the main amplifier (MA), the front-end meets the sensitivity and gain of conventional LE-based receivers with better energy efficiency by eliminating the standalone equalizer stage(s). A receiver front-end (FE) that employs a high-gain narrowband transimpedance amplifier (TIA) followed by the proposed equalizing main amplifier (EMA) is simulated in TSMC 65 nm CMOS technology, targeting 20 Gb/s. The EMA provides a high-frequency peaking to extend the FE’s bandwidth from 25 % to 60 % of the targeted data rate. The proposed FE achieves 6 dB higher gain and 2.24 dB better sensitivity compared to a conventional wideband FE that consumes the same power. Electrical measurements are also presented to demonstrate the capability of the proposed technique in restoring the bandwidth and improving the performance over the conventional design.

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